3D Heterogenous-Integrated RFICs for the Next-Generation Phased Array

NSF Award Search · 01002526DB NSF RESEARCH & RELATED ACTIVIT · $595,000 · view on nsf.gov ↗

Abstract

The three-dimensional vertically integrated circuit (3D IC) has emerged as a key technology for extending the trajectory of Moore’s Law by increasing transistor density and circuit functionality through 3D chip stacking. In addition to the benefits of scaling, the 3D IC technology enables heterogeneous integration, allowing different chipsets fabricated by different semiconductor technologies to be combined for optimal performance and cost reduction. This approach holds a significant promise for the next-generation radio-frequency integrated circuits (RFICs). However, current advanced IC packaging technologies remain largely limited to 2.5D integration and antenna-in-package implementations. The direct face-to-face stacking of RFIC chips for full 3D integration, especially with high-frequency RF interfaces, remains largely unexplored. This project aims to develop new fundamental techniques for implementing true 3D-integrated RFICs. As a proof of concept, the project will build a phased-array front-end system operating at frequencies higher than 100 GHz to establish a foundational building block for future high-frequency wideband wireless communication platforms. In parallel, the project includes a robust education and outreach program to introduce advanced wireless and semiconductor technologies to graduate and undergraduate students as well as K-12 students. Through an interdisciplinary hands-on approach, the project aims to inspire students' interest in the STEM fields and

Key facts

NSF award ID
2532205
Awardee
University of California-Berkeley (CA)
SAM.gov UEI
GS3YEVSS12N6
PI
Jun-Chau Chien
Primary program
01002526DB NSF RESEARCH & RELATED ACTIVIT
All programs
High freq comm/sensing circuits, RF/Microwave & mm-wave tech
Estimated total
$595,000
Funds obligated
$595,000
Transaction type
Standard Grant
Period
10/01/2025 → 09/30/2028